FPGA Senior Development Engineer (Magnetic Encoder)

Job Description:
1, proficient in magnetic encoder sine and cosine signal ADC position acquisition, position solution, normalization, compensation FPGA logic development, design and implementation, including program design, software compilation and debugging.
2. Responsible for the design of FPGA logic architecture of magnetic encoder, writing and testing FPGA and other underlying drivers according to product design requirements, and completing related document editing and sorting.
3. Responsible for the logic simulation, verification and sequence optimization of the FPGA of the magnetic encoder.
4, familiar with Lattice, Altera and other common FPGA logic development and compilation environment Quartus II.
5. Cooperate with DSP engineers for three-loop debugging and PID debugging, parallel port communication, and fusion control algorithm to optimize performance.
6. Familiar with SSI/BISS protocol and FPGA implementation.

Job Requirements:
1, Bachelor degree or above, major in electronics, computer, communication, information science or related, more than 5 years of FPGA software development experience.
2, proficient in magnetic encoder sine and cosine signal ADC position acquisition, position solution, normalization, compensation FPGA logic development, design and implementation, including program design, software compilation and debugging.
3, with good Verilog/VHDL, FPGA related design and development experience, proficient in its design, simulation, development process.
4, master FPGA resources timely sequence optimization, skilled use of digital circuit simulation test tools.
5, familiar with the common communication interface (serial port) development experience is better.
6, have good FPGA logic design experience, rotary transformer, magnetic encoder, optical encoder related product experience is preferred;
7, skilled use of oscilloscope, logic analyzer operation.
8, good team spirit and fast learning ability, strong communication and coordination ability.